RS译码的高层次综合实现

Implementation of RS Decoding Algorithm Based on High-level Synthesis

采用高层次综合技术实现RS译码电路,通过对RS译码C代码结构不同层次的优化,包括循环展开、求余简化、数据存储优化及算法结构优化等,探索了不同的结构对于综合后硬件电路性能和资源的影响。与传统RTL设计相比,使用高层次综合技术进行RTL设计大大节省了设计时间,减少了硬件的设计难度,降低了整体电路的设计风险。

The high-level synthesis technology is used to implement RS（Reed-Solomon） decoding circuit. Based on optimization of different structural levels of RS decoding C code, including loop unrolling, division simplification, data storage optimization, algorithm structure optimization, etc., this paper discusses the influence of different structure on synthesized hardware circuit performances and resources. Compared with traditional RTL designs, the HLS can make the developing cycle shortened, and reduce the difficulty of hardware design.