通用验证方法学在核安全级仪控平台的应用

The Application of UVM on Nuclear Advanced Safety Platform of Instrumentation and Control

核电数字化仪控系统需要高可靠性和安全性,对其进行充分的验证和测试至关重要。为促进FPGA技术在核电行业发展,需要能够被普遍认可的FPGA验证方法。然而现阶段的国际标准和研究报告(如IEC62566和NUREG/CR-7006)仅阐述了基于FPGA核安全级仪控系统的生命周期,并未涵盖具体的FPGA验证方法。因此,本文将介绍通用验证方法学(UVM)在核安全级仪控平台(NASPIC)FPGA软件自动化测试方面的应用,为同行提供一个技术参考。本文首先介绍UVM的架构,叙述基于UVM的FPGA验证平台搭建流程;其次,本文描述了NASPIC平台高速串口收发器(transceiver)的测试流程;最后,通过对比UVM与传统FPGA验证方法,说明UVM的优缺点。

As high reliability and safety is required by DIC systems of NPP, adequate testing and validation is essential.To promote the development of FPGA technology in nuclear power industry, a widely recognized FPGA verification method is critical.However, current international standards and research reports, like IEC 62566 and NUREG/CR-7006, which have demonstrated the development life circle of FPGA-based safety critical DIC in NPPs,don ＇ t cover specific FPGA validation methods.As a result, this paper introduces the application of Universal Verification Methodology（UVM） on Nuclear Advanced Safety Platform of Instrumentation and Control（NASPIC）, to provide a technical reference for peer engineers.Firstly, this paper describes the structure of UVM and the construction process of the UVM verification platform.Secondly, this paper details the test flow of the high-speed serial transceiver of NASPIC.Finally, this paper shows the strengths and weaknesses of UVM by comparing UVM and traditional FPGA verification method.