摘要
逻辑电路中NMOS管或者PMOS管受到高能粒子撞击,会产生单粒子瞬态脉冲错误。针对这种现象,提出一种识别和选择电路中敏感结点的新方法,并与门的逻辑掩蔽效应加权综合考虑,对所选择的结点通过增大恢复管的尺寸来加固,以减小单粒子效应导致的软错误率。
If the NMOS or PMOS transistors in logic circuits are hit by high-energy particles,a single event transient pulse error may occur. In order to mitigate this issue,this paper presents a new method to identify and select sensitive nodes in the circuit. This method is used along with the logical masking effect.The selected nodes are hardened by increasing the size of restoring transistors and this will reduce the soft error rate caused by single event effects.
作者
宋依青
严佳倩
SONG Yiqing;YAN Jiaqian(School of Computer Information and Engineering,Changzhou Institute of Technology,Changzhou 213032)
出处
《常州工学院学报》
2018年第2期37-41,共5页
Journal of Changzhou Institute of Technology
基金
常州工学院大学生创新创业训练计划项目(J2016054)
关键词
单粒子瞬态脉冲
逻辑掩蔽
软错误率
单粒子加固
single event transient pulse
logic masking
soft error rate
single event effects consolidation