高速总线的时序分析方法及DDR计算实例

The Analyzing Method for the Timing of High-speed Bus and a DDR Calculating Example

随着高速存储器在通信系统和图像处理等领域的普遍使用,如果系统设计中的总线时序问题得不到满足,将会严重影响系统的运行稳定性。在详细介绍了高速总线的数学模型及时序分析方法的基础上,根据时序分析方法给出了SMP8634多媒体处理器与DDR DRAM接口连接的计算实例。

With the extensive use of high-speed memory in the telecom system and video processing areas,the stability of system operation will be affected if the timing of high-speed bus in the systems can＇t be satisfied. The paper,with a detailed description of the mathematic model and analyzing method of highspeed bus timing,gives a calculating example about the interconnection between SMP8634 multimedia processor and DDR DRAM based on this method.