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一种10位160 kS/s的循环型模数转换器 被引量:2

A 10 bit 160 kS/s Cyclic ADC
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摘要 提出了一种应用于图像传感器的10位160kS/s的循环型模数转换器(ADC)。采用1.5位的流水线ADC结构,经过10次循环后,得到10位数字码输出。采用输入端自级联结构的两级运算放大器,提高了运放的增益。采用运放共享技术,实现单转双电路与ADC运放共享,降低了面积和功耗,实现了电平平移。基于0.13μm CMOS工艺,在3.3V电源电压和160kHz采样速率下对ADC进行仿真。后仿真结果表明,该ADC的有效位数为9.45位,SNR为59.1dB,SFDR为61.26dB,DNL为±0.625LSB,INL为±1.5LSB。 A 10 bit 160 kS/s cyclic ADC for image sensors was proposed.The ADC employed a 1.5 bit pipelined ADC structure,which cycled 10 times and obtained 10 bit digital code output.A two-stage operational amplifier with self-cascode structure at its input was designed to improve the amplifier gain.And the operational amplifier sharing technology was used in the ADC,so the single-ended to fully-differential circuit and the ADC could share the operational amplifier,which had reduced the area and power consumption,and had achieved the function of level shifter.Based on the 0.13μm CMOS process,the proposed ADC had been simulated on the condition of a 3.3 V supply and 160 kHz sampling rate.The post simulation results showed that the ADC achieved an ENOB of 9.45 bit,an SNR of 59.1 dB and an SFDR of 61.26 dB.The static parameters DNL and INL was±0.625 LSB and±1.5 LSB respectively.
作者 唐雨晴 曾华林 谢亮 金湘亮 TANG Yuqing;ZENG Hualin;XIE Liang;JIN Xiangliang(School of Physics and Optoelectronics,Xiangtan University,Xiangtan,Hunan 411105,P.R.China;Hunan Engineer.Lab.for Microelec.,Optoelec.and Syst.onA Chip,Xiangtan,Hunan 411105,P.R.China)
出处 《微电子学》 CAS CSCD 北大核心 2018年第4期437-442,共6页 Microelectronics
基金 国家自然科学基金资助项目(61774129) 国家自然科学基金重点项目(61233010) 湖南省自然科学杰出青年基金资助项目(2015JJ1014)
关键词 循环型模数转换器 自级联结构 运放共享技术 cyclic ADC self-cascode structure operational amplifier sharing technology
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