一种可补偿高频衰减的差分时钟驱动电路

A Differential Clock Driver for Compensating High Frequency Attenuation

基于65nm CMOS工艺,提出了一种能将差分时钟信号驱动到传输线上并且能将全摆幅差分时钟信号转换为低摆幅差分时钟信号的驱动电路。该时钟驱动电路改善了传统驱动电路无法补偿传输线的高频衰减且结构复杂的问题。采用Spectre软件对电路进行了仿真验证。仿真结果表明,所有工艺角下,温度在-40℃~125℃、电压在1.08~1.32V范围变化时,该时钟驱动电路可将1GHz工作频率的时钟信号转换为占空比为50%的低摆幅信号,该低摆幅信号在接收端可恢复为所需的轨到轨差分信号。该时钟驱动电路具有较好的高频传输特性。

Based on 65 nm CMOS process,a differential clock driver circuit that could convert a full voltage swing clock signal to a low voltage swing clock signal was proposed,which could drive the differential clock signal over an interconnection line.The problems that the traditional driver circuit had a complex structure and could not compensate the high frequency attenuation of the interconnection line were alleviated.The Spectre simulation tool was used to verify the theoretical analysis.The simulation results showed that this circuit could convert the clock signal at 1 GHz to a low voltage swing clock signal with 50% duty cycle which could be reverted to the desired railto-rail differential signal at the receiving terminal when the temperature range was-40℃~125℃ and the voltage range was 1.08 V^1.32 Vunder any process corners.The proposed circuit had a good transmission performance at high frequency.