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紫外焦平面探测器读出电路抗辐照加固设计

Radiation-Hardened Design for Ultraviolet Focal Plane Array Readout Integrated Circuit
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摘要 分析了MOS器件的辐照特性及辐照失效机理。基于Global Foundries 0.35μm CMOS工艺,设计了一款320×256抗辐照加固紫外焦平面读出电路。该电路数字部分MOS管采用环形栅和双环保护进行加固,并在读出电路表面交替生长了SiO2-Si3N4复合钝化层。对加固后的读出电路进行了γ辐照试验,并使用示波器实时监测读出电路的输出状态。对比加固前后的读出电路实时辐照状态表明,加固后的读出电路抗辐照性能得到了明显提高,其抗电离辐照总剂量由35krad(Si)提升至50krad(Si)。 The radiation characteristics and the failure mechanism of MOS device were analyzed.The readout circuit of 320×256 radiation hardening ultraviolet(UV)focal plane array was designed by using Global Foundries 0.35μm CMOS process.The digital part of the circuit was hardened by using ring gate MOSFET and double ring protection.Furthermore,the SiO2-Si3 N4 composite passivation layer was alternately grown on the chip surface readout circuit.Then the hardened readout circuit was tested by Gamma irradiation,and the output signal of the readout circuit was monitored by using an oscilloscope.By comparing the real-time irradiation state of the readout circuit before and after radiation hardening,it can be shown that the hardened readout circuit is greatly improved in radiation hardening,The total dose of anti-ionizing radiation was increased from 35 krad(Si)to 50 krad(Si).
出处 《半导体光电》 CAS 北大核心 2018年第4期502-505,510,共5页 Semiconductor Optoelectronics
基金 国家自然科学基金项目(61774162)
关键词 紫外焦平面 读出电路 抗辐照 电离辐照 UVFPA readout circuit radiation hardening ionizing irradiation
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