期刊文献+

数字化滤波器在移频锁相系统中的应用

The Application of Digitalized Filter in the Frequency-move Phase Locked Reception System
下载PDF
导出
摘要 滤波器是移频锁相系统中的重要组成部分,文章从典型的移频锁相系统出发,提出锁相环电路中带通滤波器和低通滤波器的应用需求,并在成熟的模拟滤波器的基础上,推导出数字滤波器的传递函数,对两种滤波器的幅频和相频特性进行了仿真对比,最后简要介绍了该数字化滤波器的软硬件实现以及仿真测试结果。 Filter is an important part of frequency-move reception system.The application requirement of band-pass filter and low-pass filter in PLL is proposed.And The transfer function of digitalized filter is inferred on the basis of mature simulation filter.The amplitude-frequency characteristic and phase-frequency characteristic are compared through simulation method.Finally the software realization method,the hardware design and the simulation test are introduced.
作者 黄红云 李小平 陈春芳 彭晶晶 HUANG Hong-yun;LI Xiao-ping;CHEN Chun-fang;PENG Jing-jing(Shanghai Radio Equipment Research Institute,Shanghai 200090,China)
出处 《制导与引信》 2018年第1期35-39,共5页 Guidance & Fuze
关键词 移频锁相 数字化滤波器 电路设计 frequency-move phase locked digitalized filter circuit design
  • 相关文献

参考文献2

二级参考文献10

  • 1Zahir M Hussain, Saleh R, A1-Araji, et al. Digital phase lock loops: Architectures and Applications[M]. Dor- drecht: Springer, 2006.
  • 2William F, Egan. Phase-Lock Basics[M]. New York.. Wiley, 1998.
  • 3Zhang Juesheng, Zheng Jiyu, Wan Xinping. Phase lock technique. 1994.
  • 4Roberto Pelliconi, David Iezzi, Andrea Baroni, et al. Power Efficient Charge Pump in Deep Submicron Standard CMOS Technology[J]. IEEE Journal of Solid-State Circuits, 2003.
  • 5Ye Sheng, Jansson L, Galton I. A multiple-crystal interface PLL with VCO realignment to reduce phase noise[J]. IEEE Journal of Solid-State Circuits, 2002.
  • 6Stensby, John L. Phase-locked Loops.. Theory and Applications[J]. Boca Raton: CRC, 1997.
  • 7Fouzar Y, Sawan M. A New Full Integrated CMOS Phase-Locked Loop with Low Jitter and Fast Lock Time[J]. IEEE International Symposium on Circuits Systems, May 28-31, 2000.
  • 8Best, Roland E. Phase-locked Loops.. Design, Simulation, and Applications[C]. New York.. McGraw Hill, 1997.
  • 9Bianchi, Giovanni. Phase-locked Loop Synthesizer Simulation[C]. New York: McGraw-Hill, 2005.
  • 10Dean Banerjee. PLL Performance, Simulation, and Design[M]. National Semiconductor 1998.

共引文献1

相关作者

内容加载中请稍等...

相关机构

内容加载中请稍等...

相关主题

内容加载中请稍等...

浏览历史

内容加载中请稍等...
;
使用帮助 返回顶部