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基于FPGA的NAND Flash ECC校验系统设计与实现 被引量:8

Design and implementation of NAND Flash ECC check-out system based on FPGA
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摘要 针对NAND Flash存储器由于其工艺结构的局限性而导致数据在存储过程中小概率的位翻转问题,基于Microsemi公司的Smartfusion2系列的FPGA设计并实现了基于汉明码的ECC校验方案。结合NAND Flash的结构特点和数据存储方式,将ECC校验方案分为ECC编码模块和错误检测与纠正模块。根据写入与读出NAND Flash的数据两次生成ECC,两组ECC经过一定的运算,可判断、定位并纠正错误。该校验算法通过将每512字节原始数据生成3字节的冗余数据,可达到1 bit/4 kbit的纠错能力,保证了NAND Flash数据存储过程中的可靠性。 To solve the problem of bit-flipping of data due to the limitation of the process structure of NAND Flash memory, ECC(Error Correction Code)based on Hamming code was designed and implemented based on the Smartfusion2 series FPGA of Microsemi Corporation. Combining the structural characteristics of NAND Flash and data storage,the ECC verification scheme is divided into ECC encoding module and error detection and correction module. The ECC is generated twice when program and read NAND Flash data. Through the two groups of ECC operation results can determine,locate and correct error. The ECC algorithm can achieve 1 bit/4 kbits error correction capability by generating 3 bytes of redundant data from per 512 bytes of original data,thereby ensuring the reliability of the NAND Flash data storage.
作者 王轩 常亮 李杰 WANG Xuan;CHANG Liang;LI Jie(Shanghai Institute of Micro-System and Information Technology,Chinese Academy of Science,Shanghai 200050,China;Shanghai Engineering Center for Micro-satellite,Shanghai 201203,China;ShanghaiTech University,School of Information Science and Technology,Shanghai 201210,China;University of Chinese Academy of Sciences,Beijing 100049,China)
出处 《电子设计工程》 2018年第18期184-187,193,共5页 Electronic Design Engineering
关键词 NAND FLASH ECC FPGA 检错与纠错 NAND Flash ECC FPGA error detection and correction
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