高速电路倒装互连结构的不连续性分析

Analysis of Discontinuity in Flip-Chip Interconnection for High Speed Circuit

针对倒装互连结构的不连续性,建立了各部分结构的解析式,结合等效电路以及全波仿真模型,利用仿真软件进行电路参数提取,解释了连接器件各个部分的物理意义,研究了封装的寄生参数对器件的影响。对于高速互连结构中普遍的不连续性,如焊点和传输线互连处等的信号特性进行仿真。可以找出有效的模型改进参数,使结构得到优化。应用仿真结果确定实验测试的方法,在保证模型特性的前提下,有效地降低了实验成本。最后对仿真结果进行了实验验证,并且有较好的一致性。

Combining with models of full wave simulation and equivalent circuit,the corresponding analytical structure for the discontinuities in the flip-chip connection has been established. Simulation software is used to extract the equivalent circuit parameters. The physical meaning of each part can be specific by explanation. In addition,the impact of parasitic parameters on the device can be found. So that,the simulation and test for common discontinuity in the high-speed interconnection structure,such as： signal properties of bumps,interconnection of a transmission line can be continued. This method can be used to improve the model parameters and make the structure optimization more effective. With reference to the simulation results,the method of experimental test and model parameters are determined. Using the proposed experiment method,on the premise of guarantee required feature model,effectively reduces the cost. At last,the simulation results have been verified by experiment and very good agreement obtained.