数字隔离器用陶瓷外壳的隔离电压测试

Isolation Voltage Test and Analysis of Ceramic Package for a Digital Isolator

数字隔离器提供许多电路正确工作所必需的信号隔离和电平转换，同时也要求数字隔离器防止用户使用中受到电击，保证基本人身安全。数字隔离器所用陶瓷外壳不宜采用GJBl420B-2011半导体集成电路外壳通用规范中的绝缘电阻：50％RH、500VDC施压持续时间2min、漏电流b≤50nA来控制，而应满足安全法规。分析在设备安全、元件认证等标准的基础上，实际测试记录了陶瓷外壳的各类击穿模式，对比了外壳击穿前后绝缘电阻的变化，并用于陶瓷外壳制造及封装工艺的设计和优化，实现了1．27mm节距CSOP16陶瓷外壳≥3500Vrms@50Hz、1min的电气安全标准要求，建立了陶瓷外壳隔离电压测试基本规范。

Digital isolators provide the signal isolation and level conversion functions, which are essential for circuits working correctly. Meanwhile, digital isolators prevent users from electric shocks to ensure the personal safety. So during the specific control of ceramic packages which used for digital Isolator,the safety regulations should first be considered,rather than only referring to the Insulation resistance in the GJB1420B-2011 General specification for packages of semiconductor integrated circuits： 50%,4 RH humidity, 500 VDC continuous power for 2 min, Iof≤50 nA requirements. According to the standards of equipment safety and component authentication, in this paper the different breakdown modes of ceramic packages are analyzed, including the insulation resistance comparison before ＆ after breakdown for each mode. The research results have directive significance to the ceramic package manufacturing and assembly processes of design and design optimization.In this paper, the safety standard requirement of 1.27 mm pitch CSOP16 is achieved： ≥3500 Vms @ 50 Hz, 1 min. And the basic requirements of isolation voltage testing for ceramic package is established.