CRC校验在SPI接口设计中的实现

Implementation of CRC in SPI Design

串行外设接口(SPI,serial peripheral interface)以其高速的传输性能和灵活简单的配置,广泛应用于扩展外设及其数据交换。由于串行通信传输的不确定性以及干扰等原因,通信经常会出现异常情况。为提高SPI通信传输的可靠性,在SPI接口设计中增加循环冗余校验(CRC,cyclic Redundancy Check)功能。运用硬件描述语言Verilog HDL设计并实现了具有CRC校验功能的SPI接口。仿真结果表明,该SPI接口不仅可以高速高效地工作于多种工作模式,且CRC校验功能能够保证通信传输的可靠性。

SPI features high-speed transfer and flexible configuration performances, which results in its widely use in expanding exterior devices and data communication. Owing to the uncertainty of communication, abnormal conditions often occur. In order to enhance reliability of SPI communication, this proposed SPI is combined with CRC algorithm and implemented by applying Verilog HDL. Simulation results indicate that the designed SPI is able to not only operate in variety of communication modes, but also guarantee the reliability of communication.