一种纳米级存储器芯片的ESD的物理失效分析和研究

Physical Failure Analysis and Research of a Nano Scale Memory Chip ESD

目前国内存储器芯片快速发展,非挥发性存储器NOR发展到45 nm工艺节点,NAND Flash发展到24 nm工艺节点。存储器被广泛应用到各种电子产品中,芯片的制造工艺不断提升,集成电路芯片的ESD失效占用很大比例,这个可靠性问题越来越被关注。文中对发生问题的集成电路产品进行失效分析,找到失效原因与机理是一项重要的工作,为了有效解决纳米级存储器芯片的静电保护问题,文中提出了一种有效分析纳米级存储器芯片的静电保护电路失效分析方法,从而改进和加强芯片管脚的静电保护电路。

Nowadays, memory chips were developing rapidly in China, NOR of non - volatile memory was de- veloping to 45 nm process node, NAND flash was developing to 24 nm process node, memol7 was widely used in vari- ous electronic products, chip manufacturing process was improving, ESD failure of integrated circuit chip occupied a large proportion, the more this reliability problem becomed. More and more attention had been paid to the problem of integrated circuit products failure analysis, find out the causes and mechanisms of failure was very important work. In order to effectively solve the problem of electrostatic protection of nanometer memory chips, an eltective failure analysis method for electrostatic protection circuits of nanometer memory chips was proposed. Thus, the electrostatic pro- tection circuit of chip pins was improved and strengthened.