期刊文献+

一种基于FPGA的信号采集卡 被引量:8

A signal acquisition card based on FPGA
下载PDF
导出
摘要 设计了一种多通道、高可靠性的高速数据采集系统,将之应用于雷达系统上。系统利用数据采集模块采集雷达数据输入的不同频率电压信号;以Xilinx的IP核实现物理层、逻辑层的协议,将采集到的数据处理后,实现了数据的多路收发,通过存储介质实现数据存储,通过RapidIO总线传送给PC上位机,实现远程数据的采集、存储和读取。通过Xilinx的DDS IP核产生20 MHz的正弦波信号对此系统进行验证,试验表明:此系统能采集较宽频率范围的信号并能对其进行转换,通过对比转换后的信号与采集到的信号证明收发信号一致,数据能够通过链路层进行存盘和读取,具有较好的通用性、实时性和可靠性,实验表明系统技术指标处于国内领先水平。 A high-speed data collection system with multi-channels and high reliability is designed and it is applied to radar systems. The system uses the data collection module to acquire the voltage signals in different frequency inputted from the radar data. The IP core of Xilinx is used to achieve the protocol of the physical layer and logic layer. After the collected data are processed, they are sent and received in multiple routes, and the data are stored by storage media, and is transmitted to the upper computers through the RapidIO bus, so as to realize the remote collect and read of data. This system is verified by 20 MHz sine wave signals generated from Xilinx’s DDS IP core and the experiment shows that the system can collect signals in a relatively wide range of frequency and is able to convert them. The converted signals and the collected signals are the same, which is verified by comparison. the data can be saved and read through the link layer and they are in good generality, real-time performance and reliability. The experiment data show that the technical indicators of the system are at the top level domestically.
作者 吴伟乾 柴小丽 尹家伟 武鑫 WU Wei-qian;CHAI Xiao-li;YIN Jia-wei;WU Xin(No.32 Research Institute of CETCc,Shanghai 201800,China)
出处 《电子设计工程》 2018年第23期103-107,共5页 Electronic Design Engineering
关键词 FPGA DDS IP核 AD控制 RapidIO总线 链路层 多路收发 DMA PC上位机 FPGA DDS IP core AD control RapidIO bus link layer multi-channel transceiver DMA PC computer
  • 相关文献

参考文献16

二级参考文献197

共引文献187

同被引文献89

引证文献8

二级引证文献13

相关作者

内容加载中请稍等...

相关机构

内容加载中请稍等...

相关主题

内容加载中请稍等...

浏览历史

内容加载中请稍等...
;
使用帮助 返回顶部