数字专用集成芯片前端验证方法研究

The Study on Verification Method of Digital ASICs Former Design

在分析当前数字专用集成芯片前端验证问题的基础上,提出了一种基于SystemC软件建模的专用集成芯片RTL级验证方法,并应用到对网络调度处理芯片的具体验证实验中。实验数据表明:由于采用软件模型和软件控制技术,该方案在缩短验证周期、提高验证可靠性、精确判定验证决策点以及有效集成各类验证环境等方面均明显优于传统RTL验证方案。

This paper presents a RTL verification method in digital ASICs design based on SystemC modeling technolo-gy.The use of this method in an actual queue scheduler ASIC is also illustrated and analyzed in detail.The experimen-tal results reveal that with the advantage of software modeling and software controlling technology,the process of our ASIC verification is obviously superior to the traditional process in condensing period,enhancing reliability and integrat-ing other evaluating environments.