摘要
介绍了在具有算术逻辑芯片但不具有乘法功能的简单计算机硬件系统中 ,定点一位乘法器的两种实现方案 ,使原有系统的功能得到了扩充 ,并在复旦大学开发的计算机体系结构多功能实验系统 FD- CES中对两种设计方案进行了具体实现。
This paper introduces two plans for implementing regular point one bit multiplier in a simple computer hardware system that is with algorithm logic chip and without multiplication function.And the original system function has been expended with the plans,which has been implemented in computer system architecture multifunction experiment system FDCES developed by Fu Dan University.
出处
《电脑开发与应用》
2002年第10期29-30,共2页
Computer Development & Applications