芯片级集成电路的布图与布局设计详解

Detailed Floor Plan and Place of Integrated Circuit Design on Chip Level

集成电路设计发展方兴未艾,新方法、新技术不断涌现。设计一款好芯片,不仅需要很深厚的知识背景,而且在做实际项目的时候也会遇到很多操作问题。本文以集成电路后端设计为切入点,结合具体实验,介绍了一个芯片级的设计在Encounter软件中进行布图与布局的详细过程。希望本文能给刚进入这一行业的初学者带来一些便利。

Integrated circuit design technology has just been unfolding currently, new technologies and motheds continue to emerge. In order to design a good chip, you not only need a deep technology back ground, but also will encounter a lot of operational problems while doing the actual project. This paper takes an example of the integrated circuit design and introduces a detailed process of a chip level design about floor plan and place in Encounter software. I hope this paper can bring some convenience for beginners.