摘要
以一位全减器电路设计为例,通过对其输出函数表达式的形式变换,分别采用多种门电路及译码器、数据选择器等74系列器件进行电路设计,给出9种电路实现形式,并简略分析各种电路实现的优缺点。此例说明了组合逻辑电路设计的灵活性及电路实现的多样性,所采用的设计方法对其他组合逻辑电路设计具有一定的启发的借鉴意义。
Using design of a full-subtracter circuit as an example,by changing its output function expression in the form of expression,using 74 series devices as the gates,decoder,multiplexer etc,9 circuits realization forms are given respectively.The advantages and disadvantages of the various circuit implementations are briefly analyzed.The example shows that the design of combinational logic circuits has mobility and variety,it is instructive for guiding other design of combinational logic circuits.
出处
《西安邮电大学学报》
2011年第S1期106-109,共4页
Journal of Xi’an University of Posts and Telecommunications
关键词
数字系统
组合逻辑电路
全减器
设计方法
digital system
combinational logic circuit
full-subtracter
design method