基于FPGA的曼彻斯特编解码器设计与实现

Design and Implementation of Manchester Codec Based on FPGA

介绍基于Verilog HDL设计的曼彻斯特编解码器模块,对曼彻斯特编解码器的原理进行介绍和分析,解决其编码和解码的同步问题,能够使解码器数据采样结果正确可靠,实现其编码和解码模块化,使用Verilog HDL语言实现曼彻斯特编解码器的核心功能,并且在ModelSim上实现其功能仿真。

Introduces Manchester codec module based on Verilog HDL,and introduces and analyzes the principle of Manchester codec,and solves the encoding and decoding synchronization problem,it can make encoder datas sampling correctly and reliably,and realizes the encoding and decoding modular,uses Verilog HDL language and achieves the codec Manchester kernel functions,and its functions simulation in ModelSim.