基于FPGA的射频收发前端系统设计

A Design of RF Transceiver Front-end Signal Processing System Base on FPGA

以Xilinx公司的V5系列FPGA芯片为研究对象,设计实现了一种基于VPX标准的6U射频收发前端信号处理系统。该系统主要由控制电路和射频电路组成,控制电路主要完成对外、对内的接口通信功能以及核心器件的控制。射频电路主要完成信号滤波、放大、正交上变频、功率放大等。设计的系统支持串行Rapid IO高速数据传输,为数据的高速交换提供了可能,满足了系统对带宽和数据处理能力的要求,经过验证系统的各项性能指标符合设计要求。

Taking Virtex-5 series FPGA chips of Xilinx Company as research object, a design of 6U RF Transceiver Front-End Signal processing system base on VPX has been realized. This system is mainly consisted of control circuit and RF circuit.In which, control circuits achieved the internal and external communication interfaces function, and the control of core components, While RF circuits managed the signal filtering, amplifying and I-Q mixing functions. The design supports serial Rapid IO high-speed data transmission which makes high-speed transaction impossible, and meets the requirements in both bandwidth and signal processing ability. All the system performance is validated to be according with design requirement.