一种低复杂度的稀疏FIR陷波滤波器的设计方法

A Novel Design Algorithm for Low Complexity Sparse FIR Notch Filters

FIR陷波滤波器具有线性相位、精度高、稳定性好等诸多优势,然而当陷波性能要求较高时,通常需要较高的阶数,导致FIR陷波滤波器硬件实现复杂度大大提高。该文基于稀疏FIR滤波器设计算法和共同子式消除的思想,提出一种低复杂度的FIR陷波滤波器设计方法。该方法首先采用稀疏滤波器设计算法得到满足频域性能设计要求的FIR陷波原始滤波器系数,然后对其进行CSD编码,并分析CSD编码量化系数集中所有的2项子式和孤子的灵敏度,最后根据灵敏度的大小依次选择合理的2项子式或孤子直接合成滤波器系数集。仿真结果表明,新算法设计实现的FIR陷波滤波器比已有的低复杂度设计方法最多可减少51%的加法器,有效地降低了硬件实现复杂度,大大节省了硬件资源。

FIR notch filter has many advantages such as linear phase,high precision and good stability.However,when the notch performance is required to be high,a higher order is usually required,resulting in increased greatly hardware complexity of the FIR notch filter.Based on sparse FIR filter design algorithm and common subexpression elimination,a novel algorithm is proposed for the design of low complexity sparse FIR notch filter.First,a sparse FIR notch benchmark filter that fulfills frequency response specifications is obtained from the sparse filter design algorithm.Then,each quantized filter coefficient is represented in Canonical Signed Digit(CSD).The sensitivities of all weight-two subexpressions and isolated nonzero digits of the quantized coefficient set are analyzed.Finally,the filter coefficient set with lower implementation cost is constructed by iteratively admitting subexpressions and isolated nonzero digits according to their sensitivities.Simulation results show that the proposed algorithm can save about 51%of adder compared with other low complexity filter design algorithms,which reduces effectively the implementation complexity and saves greatly the hardware cost.