逻辑平衡与高速数字电路

Logic Balance and High Performance Digital Circuits

在设计者进行系统和电路级设计时,时常会将要实现的逻辑功能或操作较为平均地分配到时序中的各个阶段,称之为逻辑平衡设计。该论文引用了逻辑平衡的方法,将其运用在高速数字部件设计中,以常用运算单元如计数器,有限状态机和乘法器的高性能设计方案为例,分析了逻辑平衡在高速集成电路设计中的应用;并分析了逻辑平衡的方法在减小电路面积,提高电路的性价比和降低电路功耗中的作用。

This paper focuses on the high performance very large scale integrated circuits design using the concept of logic balance at the first time.The high performance realization methodology is presented using the concept of logic bal-ance for most of the usually basic functional units such as counters,finite state machines(FSM)and multipliers at the logic level.Moreover,issues on the low cost and low power for high performance digital circuits are also included.