低复杂度自适应单载波频域均衡器的FPGA实现

FPGA Implementation of Low-Complexity and Self-Adaption Single Carrier Frequency Domain Equalizer

针对单载波频域均衡(single carrier frequency domain equalization,SC-FDE)技术中的线性均衡技术进行研究分析,在满足通信系统有效性和实时性的要求下,提出了一种低复杂度自适应单载波频域均衡器的FPGA(field-programmable gate array)实现方案。该方案通过对均衡器在算法和体系结构两个方面进行协同设计与优化,引入均衡系数的可配置性支持,在抵抗多径效应的同时,提高了频谱、功率利用率和信号检测效率,大幅削减了系统的计算复杂度,增强了复杂环境适应能力,改善了系统性能。实验结果表明,该方案误码率性能优良,资源利用率高,鲁棒性好,实时性强,综合效能较常规均衡器有了较大的改善,且在40 MHz的带宽下,理想的峰值吞吐率可达115 Mb/s。

This paper carries on the research on linear equalization for single carrier frequency domain equalization(SC-FDE) technology. In order to meet the communication effectiveness and real-time requirement, this paper proposesan FPGA (field-programmable gate array) implementation scheme of low-complexity and self-adaption single carrierfrequency domain equalizer. The scheme based on collaborative design and optimization in the algorithm and the systemstructure of the equalizer, supporting to configure the equilibrium coefficient, avoiding the multi-path effect at thesame time, greatly improves frequency spectrum and power efficiency, reduces the computational complexity of thesystem, enhances the adaptability to complex environment, and improves the system performance. The experimentalresults show that the scheme has excellent bit error rate, high resource utilization, good robustness and strong practicability,and the comprehensive performance of the scheme is greatly improved compared with the conventional equalizer,and the ideal peak throughput rate can reach 115 Mb/s in 40 MHz bandwidth.