寄生电容对SiC MOSFET开关特性的影响

Influence of parasitic capacitance on switching characteristics of SiC MOSFET

为了探究电路中寄生电容对SiC MOSFET高速开关特性的影响,采用理论分析与实验研究相结合的方法,考虑相关寄生电容,对SiC MOSFET的开关过程进行模态分析,确立各部分寄生电容的影响,进而建立高速双脉冲测试平台,对各部分寄生电容对SiC MOSFET开关特性的影响进行研究,揭示各部分寄生电容对SiC MOSFET开关特性的影响规律。实验结果表明:随着SiC MOSFET极间电容的增大,其开关速度降低、开关能量增大,开关过程中的电压、电流尖峰有所降低;与极间电容不同,C_J增大时会引起电流尖峰的增加。

To study the influence of parasitic capacitance on switching characteristics of SiC MOSFET,the mode analysis of the switching process of SiC MOSFET is carried out by combining theoretical analysis and experiment,and considering the parasitic capacitance.The influence of the parasitic capacitance on switching characteristics is described qualitatively.Moreover,a fast switching double pulse test platform is built to analyze the effect of the parasitic capacitance on SiC MOSFET and reveal the influence rule of the parasitic capacitance on the switching characteristics of SiC MOSFET.The experimental results show that with the increase of the capacitance between the SiC MOSFET poles,the switching speed and the switch energy increase,and the voltage and current peak in the switching process have been reduced.Unlike the capacitance between the poles,the increase of the current peak is caused by the increase of CJ.