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一种新型低存储二维离散小波变换架构 被引量:3

Memory efficient architecture for 2-D DWT
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摘要 由于现有二维离散小波变换硬件结构通常存在输入图像存储空间较大和硬件资源消耗较高的问题,制约了系统的硬件效率提升.为此,调整了输入数据的时序,设计了一种基于提升算法的新型二维离散小波变换架构.采用了横向并行、数据错位的三输入扫描方法,降低了处理模块的硬件资源消耗,同时消除了片外存储的需求.对于一幅长宽为N×N的输入图像,系统的总存储需求缩减为9 N字节.经过硬件分析,对比其他现有结构,本架构的硬件效率提升了8%以上. Two-dimensional(2-D)Discrete Wavelet Transform(D W T)is a commonly used method in digital signal processing,image analysis and image compression.Due to its large amounts of computation,it is often implemented in a hardware circuit.In general,the hardware architectures have a large input RAM and large hardware resources,which restrict the improvement of system hardware efficiency.Therefore,a memory efficient 2-D DWT architecture based on the lifting scheme is proposed in this paper.The order of input data is adjusted,horizontal parallel scanning and data dislocation 3-input method arc introduced in this work for reducing hardware resources and eliminating the off-chip RAM.For an image size of N X N,the total ram requirement of the proposed architecture is reduced to 9N bytes.The estimated hardware requirement shows that at least 8%less transistor count-dclay-product(TDP)can be saved compared with the existing architectures.
作者 高家明 梁煜 张为 刘艳艳 GAO Jiaming;LIANG Yu;ZHANG Wei;LIU Yanyan(School of Microelectronics,Tianjin Univ.,Tianjin 300072,China;School of Electronic Information and Optical Engineering,Nankai Univ.,Tianjin 300071,China)
出处 《西安电子科技大学学报》 EI CAS CSCD 北大核心 2018年第2期110-115,共6页 Journal of Xidian University
基金 国家自然科学基金资助项目(61474080)
关键词 离散小波变换 超大规模集成电路 集成电路设计 数据错位扫描 无片外存储 discrete wavelet transforms very large scale integration integrated circuit design data dislocation method off-chip random access memory less
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