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NAND闪存编程干扰错误研究 被引量:1

Research on Program Disturb Error of NAND Flash Memory
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摘要 编程干扰错误是3D-TLC NAND闪存的主要错误之一,了解3D-TLC NAND闪存编程干扰错误模式是设计可靠方案的前提和基础。以实际的FPGA测试平台为基础对3D-TLC NAND闪存的编程干扰错误的出错模式进行了测试研究,分析发现:3D-TLC NAND闪存的编程干扰错误会使单元状态转移比例具有不平衡的关系;MSB页、CSB页和LSB页具有不平衡的比特错误比例和比特错误率分布。这些测试发现为设计可靠的方案提供了重要技术参考信息。 Program disturb error is one of the main errors of 3D-TLC NAND flash memory.Understanding 3D-TLC flash program disturb error mode is the premise and foundation for designing reliable solutions.Therefore,based on the FPGA test platform for the actual programming of 3D-TLC NAND flash based program disturb error model was studied,the test result shows:3D-TLC NAND flash program disturb error will make the unit state transfer ratio has an unbalanced relationship;MSB pages,CSB pages and LSB pages with bit error ratio is not balanced and the bit error rate distribution.These findings provide important technical reference information for designing reliable solutions.
作者 阳小珊 朱立谷 张猛 张伟 YANG Xiao-shan;ZHU Li-gu;ZHANG Meng;ZHANG Wei(Computer School,Communication University of China,Beijing 100024,China;China National Computer Quality Supervising&Testing Center,15th Institute of China Electronics Technology Group Corporation,Beijing 100083,China;Wuhan National Laboratory for Optoelectronics,Huazhong University of Science and Technology,Wuhan,Hubei 430074,China;China Datang Corporation Science and Technology Research Institute,Beijing 100040,China)
出处 《中国传媒大学学报(自然科学版)》 2018年第3期23-27,17,共6页 Journal of Communication University of China:Science and Technology
基金 存储产业技术创新战略联盟共研项目(LM201701B05)
关键词 NAND闪存 3D-TLC 编程干扰错误 编程干扰错误率 NAND flash memory 3D-TLC program disturb error program disturb error rate
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