时间触发光纤通道协议芯片的设计与实现

Design and Implementation of Time Triggered Fiber Channel Protocol Chip

为支持光纤通道(FC)协议在航电系统中的应用并提高消息传输的时间确定性,将时间触发机制作为消息调度策略引入FC协议中,基于FPGA数字逻辑平台设计实现一种时间触发的FC终端协议芯片,并根据相关性能指标对其中的主要模块FC IP核、发送/接收缓存管理模块以及IRIG-B编解码模块进行逻辑设计。测试结果表明,该协议芯片端口状态机、帧发送和帧接收模块工作正常,且时域信号波形正常,数据消息能够按时间调度表依次调度,满足设计要求。

In order to support the application of Fiber Channel(FC)protocol in avionics system and effectively improve the time certainty of message transmission,time triggered mechanism is introduced as message scheduling strategy into FC protocol,and a time triggered FC terminal protocol chip based on FPGA digital logic platform is designed.At the same time,according to the related performance indicators,the main modules of the FC IP kernel,the sending/receiving cache management module and the IRIG-B codec module are designed in detail.Test results show that,the protocol chip port state machine,frame sending and frame receiving module work normally,and the time domain signal waveform is normal,and the data message can be dispatched in turn according to the time schedule table to meet the design requirements.