基于预布去耦电容的片上电源噪声抑制策略

Suppress Strategy to On-chip Power Noise Based on Pre-placement Decoupling Capacitor

去耦电容是抑制电源噪声的有效方法,为平衡去耦电容插入量与去耦电容泄漏功耗,提出一种新的预布去耦电容策略,以抑制电源噪声。在芯片物理设计的布局布线阶段之前,预先均匀地插入一定数量的去耦电容,以优化去耦电容布局并改善电源噪声。实验结果表明,采用该策略后,仅增加1%的去耦电容插入量,能够减小7. 2%的瞬态电压降,且当预布的去耦电容面积占芯片总面积的4%～6%时,能够取得较好的噪声抑制效果。

The decoupling capacitor is an effective method to suppress the power noise.In order to balance the decoupling capacitor insertion and the leakage power of decoupling capacitor,a new pre-placement decoupling capacitor strategy is proposed to suppress the power noise.In order to optimize the decoupling capacitor layout and improve the power supply noise,a certain number of decoupling capacitors are inserted uniformly in advance before the layout and routing phase of the chip physical design.Experimental results show that,after the usage of the proposed strategy,only 1%of the decoupling capacitor insertion can reduce the transient voltage drop by 7.2%,and the better noise suppression effect can be obtained when the area of the decoupling capacitor of the pre-placement is 4%to 6%of the total area of the chip.