子系统级的DFT验证平台搭建

Subsystem level DFT verification platform setup

本文提出了一个基于子系统的可测性设计(DFT)验证平台,首先,介绍了可测性设计技术的基本原理,主要方法以及相关协议;其次,介绍了片上系统级的DFT测试平台,通过对其分析提出搭建子系统级DFT验证平台的必要性;最后,详细介绍了子系统级DFT验证平台的实现,包括其原理、实现方式及其测试结果等。该子系统级DFT验证平台可将DFT验证进场作业时间点提前,并且具有收敛速度快、易于搭建等特点,对系统级DFT验证具有一定的参考价值。

This paper presents a DFT verification platform based on subsystem.Firstly,the basic principles,main methods and related protocols of the testability design technology are introduced.Secondly,the on-chip system-level DFT test platform is introduced.The necessity of establishing the subsystem-level DFT verification platform is analyzed through its analysis.Finally,the detailed introduction is given.The realization of the subsystem-level DFT verification platform includes its principles,implementation methods,and test results.The subsystem-level DFT verification platform could advance the time point of the DFT validation entry operation,and has the characteristics of fast convergence and easy construction,which shows certain reference value for subsystem-level DFT verification.