摘要
全数字锁相环存在非线性部件,传递函数难以表达。通过Z域分析法选择合适的参数,分析了触发器型全数字锁相环的工作原理,得出Z域闭环传递函数,并以此研究了锁相环的全局稳定性和稳态误差,提出了各参数的约束条件。采用Xilinx ISim仿真与FPGA逻辑器件验证相结合的方法实现了一种单相全数字锁相环,并给出实验结果。结果表明,该锁相环具有锁相范围宽、动态响应快和稳态误差小的特点,具有一定的应用价值。
The transfer function of all digital phase-locked loop is difficult to obtain because of the non-linear parts. The operation principle of flip-flop all digital phase-locked loop was analyzed and the Z domain closed loop transfer function was obtained by the method of Z domain analysis with proper parameters. The global stability and the steady-state error of the phase-locked loop were studied and the parameter constraints relationship was built. A kind of all digital phase-locked loop was designed by using Xilinx ISim simulation and FPGA logical device,and the experiment results were given. The results show that this all digital phase-locked loop has a wide frequency range,fast dynamic response,small steady-state error and certain application value.
作者
马莽原
石新春
付超
王慧
孟建辉
MA Mangyuan;SHI Xinchun;FU Chao;WANG Hui;MENG Jianhui(State Key Laboratory of Alternate Electrical Power System with Renewable Energy Sources,North China Electric Power University,Baoding 071003,Hebei,China)
出处
《电气传动》
北大核心
2019年第1期39-41,52,共4页
Electric Drive
关键词
高频感应加热
全数字锁相环
现场可编程门列阵逻辑器件
Z域分析
high-frequency induction heating
all digital phase-locked loop(ADPLL)
field programmable gate array(FPGA)logical device
Z domain analysis