摘要
介绍了直接数字合成器(DDS)工作的原理,提出了DDS资源优化的设计方法,并在ISE(integrated software environment)软件环境下使用verilog语言在现场可编程门阵列(FPGA)上设计实现了一种双路正交输出且具有高精度低杂散的DDS.在MATLAB的环境下,对其输出的频谱特性进行了仿真,最后分析了DDS的设计参数和输出信号杂散度之间的关系,为工程应用的实现提供了设计依据.
The paper first introduces the principle and optimizing method of the direct digital synthesizer(DDS),using Verilog language inimegrated software environment(ISE)environment,a DDS with dual quadrature output and high precision and low spurious output is designed and implemented on field programmable gate array(FPGA),under the environment of MATLAB,the spectral characteristics of its output are simulated,finally analyzes the relationship of the parameters and the spurious noise,which can being a reference in DDS design.
作者
陈丽燕
许惠英
陈亮亮
CHEN Liyan;XU Huiying;CHEN Liangliang(School of Electronic Science and Engineering,Xiamen University,Xiamen 361005,China)
出处
《厦门大学学报(自然科学版)》
CAS
CSCD
北大核心
2019年第1期116-121,共6页
Journal of Xiamen University:Natural Science
基金
国家自然科学基金(11674219)
关键词
直接数字合成器
现场可编程门阵列
杂散
高精度
资源优化
direct digital synthesizer
field programmable gate array
spurious noise
high precision
resource optimization