FPGA时序结构的LBT变换控制器设计

Design of LBT transform controller based on FPGA ′s timing structure

JPEG XR编码算法中重叠双正交变换(LBT)传统的FPGA实现都是基于线性提升结构,无时序约束,存在亚稳态、码流不受控等问题。为此,设计了一种基于FPGA时序结构的LBT变换控制器,该设计采用混合状态机,将LBT变换算子设计为时序控制结构的数据处理模块。数据处理模块通过握手信号与前后控制模块进行指令通信,并根据指令进行相应的数据处理。为了节省FPGA内部存储空间,该设计采用单RAM循环结构,由通道选择器来切换各个控制模块与RAM之间的通道。各个控制模块根据数据处理模块反馈的应答指令实时计算图像数据的地址,交叉对RAM进行读写操作。实验结果表明,该控制器实现了对LBT变换的FPGA时序约束,处理后的图像与MATLAB仿真图像基本一致,达到了预期目的。

For the lapped bi-orthogonal transform(LBT)in JPEG XR encoding algorithm,the traditional implement method is always using linear lift structure which has no timing constraint,and it could cause some problems such as metastable state,uncontrolled code flow.Therefore,a LBT transform controller based on FPGA′s timing structure has been designed.In this design,mixed state machines is used to make the LBT transform operators to be data dealing modules that are timing-controlling-structure.The data dealing modules communicates with front and back controlling modules through handshake signals,and processes data according to relevant instructions.Single RAM cycle structure is used in the design,so that it can save FPGA internal storage space.The channels between each controlling modules and RAM are switched via channel chooser.Each controlling module computes addresses of image data in real time and reads or writes the RAM crossways on the basis of the feedback instructions of data dealing modules.Experimental results show that the controller has realized FPGA timing constraint on LBT transform,and the images processed by it are almost same to the results on MATLAB.This design has achieved desired goals.