摘要
CMOS器件结构会引起闩锁效应,国内外目前有相关标准来检测集成电路的抗闩锁能力,但大部分集成电路的闩锁试验都是在电路静态工作下进行试验。该论文根据相关试验标准,结合典型集成电路动态工作情况,研究集成电路的动态闩锁能力。
The latch-up effect will occurs in CMOS device,there are currently some relevant standards domestic and overseas to detect the latch-up resistance of integrated circuit,but most IC latch experiments are conducted under static operation of the circuit.This paper studies the dynamic latch-up capability of integrated circuits based on the relevant test standards and the dynamic working conditions of typical integrated circuits.
作者
姜汝栋
邵振宇
JIANG Rudong;SHAO Zhenyu(China Electronics Technology Group Corporation No.58 Research Institute,Wuxi 214072,China)
出处
《电子与封装》
2019年第2期35-37,41,共4页
Electronics & Packaging