基于FPGA的高速图像采集处理系统优化

Optimization on high speed image acquisition and processing system based on FPGA

针对图像检测与目标识别的方法精确性问题,本文采用硬件描述语言中提出的自顶向下设计思想和方法。运用VERILOG HDL硬件描述语言在QUARTUS ii 11.0软件上完成各个模块设计,而后运用MODELSIM对模块进行波形仿真。通过功能测试,系统满足设计要求。

The accuracy of image detection and target identification method is analyzed. Design concept from hardware description language, namely, Top-Down approach, is used. The study adopts the VERILOG HDL hardware description language to complete each module design on the software QUARTUS ii 11.0. Then, the waveform is simulated using MODELSIM. After the system design is completed, functions are tested on the development board and are proved to meet the design requirements.