SiC BJT的新型高速低损驱动电路设计

Design of Novel Driver with High-speed and Low-loss for SiC BJT

SiC BJT新型器件是IGBT器件的有力竞争对手,由于SiC BJT是电流型器件,设计适应于SiC BJT的电流型驱动电路非常重要。针对传统双电源阻容RC(resistance-capacitance)驱动电路的不足,设计了一种双电源阻性时序驱动电路。该驱动电路由开通支路、稳态支路和关断支路3个支路组成,通过延时电路产生不同的驱动信号,分别控制3个驱动支路。该结构可以解决传统RC驱动电路的占空比问题和驱动振荡问题,和传统RC驱动电路相比较,其驱动损耗减小很多。为了验证新驱动电路的优势,对两种驱动电路分别进行LTSPICE仿真,并制作了对应的驱动样板,仿真和实验结果验证了所提出方案的良好驱动性能。

The novel SiC BJT is a powerful competitor for IGBT devices. Since the SiC BJT is a current-mode device, the design of a current-mode driver suitable for SiC BJT is very important. To overcome the disadvantages of the traditional dual-source resistance-capacitance(RC) base driver, a dual-source resistance and time-sequence base driver was designed in this paper, which was composed of three branches, i.e., turn-on branch, steady driving branch, and turn-off branch. These branches can be controlled by different driving signals generated by a delay circuit, respectively. The proposed driver can solve problems such as the duty circuit limit and driver oscillations with the traditional RC driver;comparatively, its power loss was also reduced obviously. To validate the advantages of the novel driver, two drivers were simulated by LTSPICE, respectively, and the corresponding prototypes were fabricated. Simulation and experimental results verified the satisfying driving performance of the proposed scheme.