摘要
本文提出了一种多核片上系统(MPSoC)全局主动访存调度优化方法(GPMS)来提升系统的访存性能。该方法利用IP(intellectual property)核的访存局部性和延迟容忍度,通过限制访存冲突的IP核使其在一个调度窗口内分别连续访问内存,从而减少访存冲突次数,同时不存在访存冲突的IP核在调度窗口内一直保持内存的使用权,从而可以充分发挥内存控制器端访存队列调度的自由度和DRAM的bank级并行性。实验结果表明,当IP核间访存冲突严重时,该方法相比访存队列调度方式可以提升1到2倍的访存带宽。
A global proactive memory scheduling method is proposed for multi-processor system-on-chip (MPSoC) to improve memory performance. This method uses the memory access locality and delay tolerance of IP (intellectual property) cores. By restricting the conflicting IP cores, they continuously access the memory within a scheduling window, thereby reducing the number of memory conflicts. At the same time, IP cores that do not have memory access conflicts maintain the memory usage rights within the scheduling window. In this way, the freedom of memory scheduling queue on memory controller side and bank-level parallelism of DRAM can be fully utilized. The experiment results show that when the IP core memory access conflict is serious, the method can increase the memory bandwidth by 1 to 2 times compared with the memory scheduling queue method.
作者
李鹏
曾露
王焕东
章隆兵
Li Peng;Zeng Lu;Wang Huandong;Zhang Longbing(State Key Laboratory of Computer Architecture(Institute of Computing Technology, Chinese Academy of Sciences), Beijing 100190;Institute of Computing Technology, Chinese Academy of Sciences, Beijing 100190;University of Chinese Academy of Sciences, Beijing 100049;Loongson Technology Corporation Limited, Beijing 100095)
出处
《高技术通讯》
EI
CAS
北大核心
2019年第3期203-212,共10页
Chinese High Technology Letters
基金
国家"核高基"科技重大专项课题(2009ZX01028-002-003
2009ZX01029-001-003
2014ZX01020201
2014ZX01030101)
国家自然科学基金(61521092
61232009
61222204
61432016)资助项目