摘要
依据电参数指标要求,针对高压-高增益硅功率晶体管基区结构和终端结构进行优化研究。提出了一种可用于改善集电极-发射极击穿电压(V_((BR)CEO))和电流放大倍数(β)矛盾关系的带埋层的新型基区结构,并针对埋层基区结构对高压-高增益硅功率晶体管电性能及可靠性的影响进行了研究。仿真结果表明:新型基区结构不仅可以很好地折中晶体管β与V_((BR)CEO)之间的矛盾关系,而且还能在较大的埋层基区宽度、埋层基区掺杂峰值浓度范围内使晶体管获得较低且一致性较好的饱和压降;具有新型基区结构的晶体管在改善正偏的情况下抗二次击穿能力具有明显优势。由仿真得到的器件结构参数,研制出的样片的β,V_((BR)CEO)和集电极-基极击穿电压(V_((BR)CBO))均满足电参数指标要求。
According to the electrical parameter requirements,the optimization of the base structure and terminal structure of high-voltage and high-gain silicon power transistor was studied.A new base structure with buried layer which can improve the contradiction between the collector-emitter breakdown voltage(V(BR)CEO)and the current amplification(β)was proposed.In addition,the influences of the buried layer structure on the electrical performance and reliability of high-voltage and high-gain silicon power transistors were studied.The simulation results show that the new base structure can compromise the contradiction between β and V(BR)CEO,and achieve a low and consistent saturation voltage drop within a larger range of width and the peak doping concentration of the buried base region.The transistor with new base structure has an obvious advantage in resisting the secondary breakdown under the condition of improving positive bias.According to the device structure parameters obtained by simulation,β,V(BR)CEO and collector base breakdown voltage(V(BR)CBO)of the sample meet the requirements of the electrical parameters.
作者
杨宝平
江昆
黄锋
Yang Baoping;Jiang Kun;Huang Feng(Huanggang Normal University,Huanggang 438000,China)
出处
《半导体技术》
CAS
北大核心
2019年第3期177-184,共8页
Semiconductor Technology
基金
国家自然科学基金资助项目(31660482)
湖北省教育厅科学技术研究项目(B2018187)
关键词
高增益
功率晶体管
埋层基区
终端保护
击穿电压
high gain
power transistor
buried base
terminal protecti on
breakdown voltage