3Tsz Yin Man, Philip K T Mok, Mansun Chan. Design of area-efficient, low-quiescent-current LDOs for chip-level power management[C]//Integrated Circuits, Sin- gapore: IEEE, 2007,26-28.
4Huei--Sheng Jhuang, Jia--Hui Wang, Zi--Yu Zeng, et al. A low dropout linear regulator with high power supply rejeetionEC]// ISIC 09. Proceedings of the 2009 12'h International Symposium on Integrated Cir- cuits, 2009 : 41-44.
5Wenguan I.i, Ruohe Yao, I.ifangGuo. A CMOS low- dropout regulator with high power supply rejection [C]// IEEE International Conference of Electron De- vices and Solid-State Circuits. Xi' an: IEEE, 2009: 384-387.
6Gupta V, Rincon-Mora G A. A low dropout, CMOS regulator withhigh PSR over widebandfrequencie.s [C]//IEEE Int Syrup Cireuits yst. [s. 1. ], IEEE, 2005 : 4245 4248.