Optimization of test resources for 3D SoC based on game theory

The ever-increasing complexity of on-chip interconnection poses great challenges for the architecture of conventional system-on-chip(SoC) in semiconductor industry. The rapid development of process technology enables the creation of stacked 3-dimensional(3 D) SoC by means of through-silicon-via(TSV). Stacked 3 D SoC testing consists of two major issues, test architecture optimization and test scheduling. This paper proposed game theory based optimization of test scheduling and test architecture to achieve win-win result as well as individual rationality for each player in a game. Game theory helps to achieve equilibrium between two correlated sides to find an optimal solution. Experimental results on handcrafted 3 D SoCs built from ITC'2 benchmarks demonstrate that the proposed approach achieves comparable or better test times at negligible computing time.