低功耗神经网络计算芯片技术研究

Research on low-power neural network computing accelerator

当前人工智能引发了全球的热潮,它涵盖了图像识别、视频检索、语音识别、自动驾驶等各类智能应用.在人工智能算法中,神经网络算法扮演着举足轻重的作用,也成为了当前的研究热点.但是神经网络算法本身具有灵活性高、计算复杂、数据量大的特点,这也对计算平台提出了高性能、低功耗、高灵活性及高存储等方面的需求.针对神经网络专用芯片,本文提出了可重构硬件架构来满足神经网络的灵活性需求,以可重构架构为基础的Thinker系列可以执行多类神经网络运算.在该架构基础上,本文探究了相应的数据访存优化方案来降低功耗.在存储系统优化方面,基于eDRAM的神经网络加速方案和计算存储一体化ReRAM方案可以满足神经网络计算在存储性能及低功耗方面的需求,它们配合可重构硬件架构可以实现全新的神经网络加速框架.在高效计算方面,本文针对低比特神经网络的标准卷积计算提出基于积分和基于滤波器拆分特征重建的优化方案,以此满足高性能需求.

Artificial intelligence has aroused a global upsurge,which covers image recognition,video retrieval,speech recognition,automatic driving,and several other significant applications.As for artificial intelligence algorithms,neural network algorithms play a crucial role and have attracted considerable attention from numerous researchers.Moreover,neural networks have the characteristics of high flexibility,complex computation,and a large amount of data;which also indicates the requirements of high performance,low-power consumption,and flexibility for hardware computing platforms.This study aims to propose a reconfigurable hardware architecture to meet the flexibility requirements of a neural network.Based on the proposed architecture,the corresponding data access optimization schemes are explored to reduce the power consumption.In the optimization of the storage system,an acceleration scheme of neural network based on eDRAM and ReRAM scheme,which is used for computing and storage integration,satisfy the requirement of neural network computing.Regarding highperformance computing,we have proposed convolution optimization schemes based on integral and filter splitting feature reconstruction to enable low bit neural network operations to meet high-performance requirements.