摘要
介绍了数字时钟管理器(DCM)的脉宽测量系统在现场可编程门阵列(FPGA)中的实现,运用Xilinx公司Virtex-Ⅱ系列FPGA芯片内部DCM的倍频功能,对输入时钟进行倍频,提高计数时钟的频率,并在开发板上通过在线仿真验证了脉宽测量精度的提高。
The paper introduces the implementation of digital clock manager(DCM)pulse width measurement system in field programmable gate array(FPGA),uses the frequency doubling function of DCM in Xilinx Company Virtex-Ⅱ series FPGA chip to double the frequency of input clock,so as to improve the frequency of counting clock,simulates and validates the improvement of pulse width measurement accuracy through on-line simulation on the development board.
作者
郑卉卉
ZHENG Hui-hui(The 723 Institute of CSIC,Yangzhou 225101,China)
出处
《舰船电子对抗》
2019年第2期64-67,共4页
Shipboard Electronic Countermeasure
关键词
脉宽测量
数字时钟管理器
倍频
pulse width measurement
digital clock manager
double frequency