栅槽刻蚀工艺对增强型GaN HEMT器件性能的影响

Influence of Gate Recess Etching Process on the Performance of E-Mode GaN HEMTs

基于凹槽栅增强型氮化镓高电子迁移率晶体管(GaN HEMT)研究了不同的栅槽刻蚀工艺对GaN器件性能的影响。在栅槽刻蚀方面,采用了一种感应耦合等离子体(ICP)干法刻蚀技术与高温热氧化湿法刻蚀技术相结合的两步法刻蚀技术,将AlGaN势垒层全部刻蚀掉,制备出了阈值电压超过3 V的增强型Al_2O_3/AlGaN/GaN MIS-HEMT器件。相比于传统的ICP干法刻蚀技术,两步法是一种低损伤的自停止刻蚀技术,易于控制且具有高度可重复性,能够获得更高质量的刻蚀界面,所制备的器件增强型GaN MIS-HEMT器件具有阈值电压回滞小、电流开关比(I_(ON)/I_(OFF))高、栅极泄漏电流小、击穿电压高等特性。

The effects of different gate recess etching processes on performances of E-mode gallium nitride high electron mobility transistors(GaN HEMTs) were studied. The E-mode Al2O3/AlGaN/GaN MIS-HEMT devices with a threshold voltage of more than 3 V were fabricated by two-step etching technique, combining inductively coupled plasma(ICP) dry etching technique with high temperature thermal oxidation wet etching technique. The AlGaN barrier layer at the recessed gate were fully etched. Compared with the conventional ICP dry etching technique, the two-step etching was an easy-to-control and highly repeatable etching technique, which could be self-terminated at the AlGaN/GaN interface with negligible effect on the underlying GaN layer, and a higher quality etching interface could be obtained. The fabricated E-mode GaN MIS-HEMT devices by two-step etching technique exhibit the characteristics of low threshold voltage hysteresis, high ION/IOFF, low gate leakage current and high breakdown voltage.