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嵌入式图形处理器Alpha混合单元设计与实现 被引量:2

Ddesign and implementation of alpha blending unit in embedded GPU
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摘要 针对嵌入式GPU对Alpha混合功能的设计需求,设计并实现一种支持6种混合方式的Alpha混合单元。通过分析OpenGL ES/OpenGL支持的各种混合方式以及混合所需要的各类运算,确定数据格式;采用七级流水线结构,将多种混合操作均衡的分布到各流水级中。在ZC706开发板进行测试,采用vivado工具,在Zynq-7000系列FPGA芯片上对电路进行综合,结果表明,Alpha混合单元工作频率达到178 MHz,七级流水线时间均衡。以复杂场景平均需进行3次混合为标准,Alpha混合单元的半精度浮点数像素吞吐率需达到356M(pixel)/s,定点像素数据吞吐率达到712M(pixel)/s,可以满足显示分辨率最高达到1 600×1 200×60Hz的显示要求。 According to the design requirement of Alpha blending function in embedded GPU, an Alpha blending unit supporting six blending modes is designed and implemented. The data format is determined by analyzing the various blending modes supported by OpenGL ES/OpenGL and all kinds of operations needed for blending, and a seven-stage pipeline structure is adopted to distribute the various mixed operations evenly among the pipeline levels. The circuit is tested on ZC706 development board and synthesized on Zynq-7000 FPGA chip with vivado tool. Results show that the working frequency of Alpha blending unit is 178 MHz, and the seven-stage pipeline time is balanced. According to the standard of three blending times on average for complex scenes, the half-precision floating-point pixel throughput of Alpha blending unit can reach 356 M(pixel)/s, and the throughput of fixed-point pixel data can reach 712 M(pixel)/s. They therefore can meet the display requirement of the highest resolution of 1 600×1 200×60 Hz.
作者 杜慧敏 黄世远 郝武 DU Huimin;HUANG Shiyuan;HAO Wu(School of Electornic Engineering,Xi'an University of Posts and Telemmunications,Xi'an 710121,China)
出处 《西安邮电大学学报》 2019年第1期41-46,62,共7页 Journal of Xi’an University of Posts and Telecommunications
基金 陕西省重点研发计划资助项目(2017ZDXM-GY-005) 西安市科技计划资助项目(201805040YD18CG24(5)) 西安邮电大学创新基金资助项目(102-602080009)
关键词 Alpha混合 流水线 定点数 浮点数 路径优化 alpha blending pipeline fixed-point number floating point number path optimization
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