在FPGA上实现及优化加速卷积神经网络的方法

METHOD FOR IMPLEMENTING AND OPTIMIZING CONVOLUTIONAL NEURAL NETWORK ON FPGA

本文在FPGA芯片zynq7020上实现了一种基于Lenet-5卷积神经网络的AI芯片设计,采用了将卷积操作转换为矩阵乘法、并行计算、流水线计算等技术来加速CNN的运算速度,提高了片上系统性能,并利用该芯片,实现了对手写数字集MNIST的快速准确识别.实验证明,在分类准确率几乎相同的前提下,该AI芯片与ARMCortex-A9CPU在处理相同批量MNIST数据集时实现了大约22倍的加速.并且该AI芯片在实现CNN的设计时采用了Vivado软件编程替代传统的硬件语言,降低了软件开发人员开发FPGA的门槛.

An Artificial Intelligence(AI) chip design based on Lenet-5 convolutional neural network(CNN) was implemented on the FPGA development board in this paper. The techniques of converting convolution operations into matrix multiplication, parallel computing, pipeline calculation, etc.They were adopted to accelerate the operation speed of CNN and have improved the performance of the system on chip. Using the chip, the fast and accurate recognition of the handwritten digit sets MNIST is realized. Under the premise that the classification accuracy is almost the same, it has been proved by experiments that the AI chip achieves approximately 22 times acceleration when processing the same batch of MNIST datasets compared to the ARM Cortex-A9 CPU.The AI chip used Vivado software programming to replace the traditional hardware language when implementing CNN design, which reduced the threshold for software developers to develop FPGAs.