摘要
基于三维集成技术的功率MOSFET器件,在发热量大和散热难的双重压力下,热可靠性设计凸显得尤为重要。文中采用硅通孔散热方式,在三维功率器件内嵌入大量的散热硅通孔,以降低芯片内热阻,疏导功率器件产生的热量,保证器件有源区结温低于极限安全结温,可有效提高芯片的热可靠性。以100V,60A的功率VDMOS器件为研究对象,以提高芯片的热可靠性为目的,合理设计和充分优化了三维功率MOSFET器件的版图和散热硅通孔的布局。基于多物理场分析软件开展了大量的热可靠性仿真分析工作,并流片验证了设计的正确性。
The thermal reliability design is of particular importance for the power MOSFET devices based on the 3D integration technology under the dual pressure of large heat generation and difficulty in heat dissipation. A great number of heat dissipation through-silicon viae are embedded in a 3D power device by using the through-silicon via heat dissipation pattern,so as to reduce the internal thermal resistance of a chip,dissipate the heat generated by the power device,ensure the junction temperature in the active region of the device is lower than the extreme security junction temperature,and effectively improve the thermal reliability of the chip. Taking the 100 V 60 A power VDMOS device as the research object,the layout of the 3D power MOSFET device and distribution of heat dissipation through-silicon viae are reasonably designed and fully optimized,so as to improve the thermal reliability of its chip. A lot of simulation and analysis work of thermal reliability was done on the basis of the multi-physics field analysis software. The correctness of the design was verified by the tape-out.
作者
林洁馨
杨发顺
马奎
丁召
傅兴华
LIN Jiexin;YANG Fashun;MA Kui;DING Zhao;FU Xinghua(College of Big Data and Information Engineering,Guizhou University,Guiyang 550025,China)
出处
《现代电子技术》
北大核心
2019年第12期81-85,共5页
Modern Electronics Technique
基金
国家自然科学基金地区科学基金项目(61664004)~~
关键词
热可靠性设计
MOSFET
三维集成技术
功率器件
硅通孔布局
散热
热阻降低
thermal reliability design
MOSFET
3D integration technology
power device
through silicon via layout
heat dissipation
thermal resistance reduction