摘要
文章对PCB空间有限情况下,去耦电容的摆放位置设计方案进行了理论分析和仿真分析验证。结果表明,在无法保证去耦电容都拥有过孔的情况下,将去耦电容分别放置于不同层面,将优于将其放置于同一层面。
In this paper, the decoupling capacitor placement design scheme is analyzed based on theoretical analysis and simulation verification which have limited PCB space. The result shows that, placing the decoupling capacitor within the different layer is better than the same layer, if decoupling capacitor have not enough vias.
作者
宋晓锋
李德恒
Song Xiaofeng;Li Deheng
出处
《印制电路信息》
2019年第6期3-5,共3页
Printed Circuit Information
关键词
电源完整性
去耦电容
目标阻抗
仿真
Power Integrity
Decoupling Capacitor
Target Impedance
Simulation