基于FPGA的抗辐照加固波控单元设计

Design of anti-radiation hardened beam-steering units based on FPGAs

针对静态随机存取存储器(SRAM)型现场可编程门阵列(FPGA)在星载波控单元应用中存在单粒子翻转效应的问题,提出一种基于自主刷新控制电路的抗辐照加固星载波控单元设计方案。该方案构建了以国产芯片BSV2CQRH为主的控制电路,对FPGA控制器XQR2V3000内部配置位定时刷新,采用低电压差分信号(LVDS)通信方式控制抗辐照LVDS接口芯片,完成与前级波控管理平台波控码的收发,同时控制晶体管晶体管逻辑门(TTL)驱动器以同步串行方式完成10路移相器内部波控码的更新。测试结果表明,3.125 MHz串行时钟频率下布相时间小于50 μs,采样脉冲下降沿均位于数据码元的1/2长度处,数据保持时间满足采样要求,实现了设计目标。

Aiming at the problem of single event upset in the application of Static Random Access Memory(SRAM) Field Programmable Gate Array(FPGA) in spaceborne beam-steering unit, a design scheme for radiation hardened beam-steering unit is proposed based on the scrubbing control circuit. The FPGA controller XQR2V3000 is refreshed periodically by constructing the control circuit based on chip BSV2CQRH. The anti-radiation Low Voltage Differential Signaling(LVDS) interface chips are adopted to complete the code transceiver with the front management platform by LVDS communication mode. Meanwhile, the Transistor Transistor Logic(TTL) drivers are controlled to complete the update of 10 phase shifters by synchronous serial mode. The test result shows the phase distribution time is less than 50 s when the clock is 3.125 MHz, and the falling edge of sampling pulse is located at half the length of a data symbol, ensuring data holding time long enough to sample correctly.