摘要
通过对电路老化检测与查找表(Look-Up Table,LUT)方法的研究,提出一种基于查找表的电路老化检测传感器设计方案.该方案首先建立老化压控振荡器(Voltage Controlled Oscillator VCO)频率降级?tp和电压压降?VDC的老化模型,通过老化感知电路产生基准频率和老化频率其次,利用相位放大原理得到频差信号,并采用计数基准VCO周期的方式将频差信号量化.然后,按LUT规则将老化信息以电压方式输出.最后,在TSMC 65 nm CMOS工艺下仿真验证,结果表明所设计的老化检测传感器感应分辨率为0.001 8%,老化模型计算值与仿真数据相对误差在9%以内,能够实现电路老化检测的功能.
Based on the research of circuit aging detection and look-up table(LUT)method,a design scheme of aging detection sensor based on LUT output circuit is proposed.The scheme first establishes an aging model of aging voltage-controlled oscillator(VCO)frequency degradation?tp and voltage drop?VDC,which generates reference frequency and aging frequency through aging sensing circuit.Then,the frequency difference signals are obtained using the phase amplification principle.The frequency difference signal is quantized by counting the reference VCO period.Next,the aging information is output as voltage according to LUT rules.The simulation results of TSMC 65 nm CMOS process show that the designed aging detection sensor has an inductive resolution of 0.001 8%,and the relative error between the aging model calculation value and the simulation data is less than 9%,which can realize the function of circuit aging detection.
作者
张海明
汪鹏君
张跃军
ZHANG Haiming;WANG Pengjun;ZHANG Yuejun(Faculty of Electrical Engineering and Computer Science,Ningbo University,Ningbo 315211,China;College of Mathematics,Physics and Electronic Information Engineering,Wenzhou University,Wenzhou 325035,China)
出处
《宁波大学学报(理工版)》
CAS
2019年第4期25-31,共7页
Journal of Ningbo University:Natural Science and Engineering Edition
基金
浙江省自然科学基金(LY18F040002)
国家自然科学基金(61874078,61871244)
浙江省公益项目(2016C31078)
宁波大学研究生科研创新基金
关键词
电路老化
相位比较
查找表
老化检测
circuit aging
phase comparison
look up table
aging detection