10 Gbps VCSEL激光器驱动CMOS集成电路

10 Gbps VCSEL laser driving CMOS integrated circuits

本设计采用国内GSMC130nmSOICMOS工艺设计了一款10Gbps的激光器驱动芯片。电路核心部分由限幅放大级、输出驱动电路、8bitDAC电路、偏置基准电路等组成。其中,为了在130nm工艺下实现10Gbps速率,限幅放大级采用共享电感并联峰化技术实现带宽拓展,同时兼顾了面积与功耗的考量。该芯片整体面积为2.16mm×1.24mm,采用1.2V电源供电,后仿真结果表明,在典型输入差分200mV、10Gbps的激励信号下,可提供2~8.6mA范围可调调制电流和1~3mA范围可调偏置电流。在典型配置下,输出5mA调制电流和2mA偏置电流,总功耗为51.2mW,输出眼图张开且清晰。性能指标可以满足光纤通信系统和快速以太网的应用。

This design uses a domestic GSMC 130nm SOI CMOS process to design a 10 Gbps laser driver chip.The core part of the circuit consists of a limiting amplifier stage,an output driver circuit,an 8-bit DAC circuit,and an offset reference circuit.Among them,in order to achieve 10 Gbps rate in the 130 nm process,the limiting amplifier stage uses the shared inductor parallel peaking technology to achieve bandwidth expansion,taking into account the area and power consumption considerations.The chip has an overall area of 2.16 mm×1.24 mm and is powered by 1.2 V supply.The simulation results show that the adjustable modulation current and 1~3mA range from 2 to 8.6 mA can be provided under typical input differential 200 mV,10 Gbps excitation signal.Range adjustable bias current.In a typical configuration,the output 5 mA modulation current and 2 mA bias current are used, with a total power consumption of 51.2 mW,and the output eye is open and clear.Performance metrics can be met for fiber-optic communication systems and Fast Ethernet applications.