摘要
为了完成目前对复杂宽带信号的实时捕获及处理,设计了基于TIADC架构的20GSPS数字示波器系统.针对其对时钟的要求设计了低抖动的高速采样时钟电路,并完成了基于正弦的误差校准以及数据同步算法的设计.最后针对该系统进行了实验分析,结果表明:该系统能够在很大程度上降低频谱失真,能够相对很好的完成实时采样,具有良好的系统性能.
In order to accomplish the real-time acquisition and processing of complex wideband signals, a 20 GSPS digital oscilloscope system based on TIADC architecture is designed. The overall architecture of this system is designed. A low-jitter high-speed sampling clock circuit is designed according to the requirements of the clock. In addition, a sine-based error calibration and data synchronization algorithm are also designed. Finally, an experimental analysis of the design system is carried out. The results show that the system can largely reduce the spectral distortion, and can perform relatively real-time sampling relatively well, with good system performance.
作者
黄科文
刘益民
洪远泉
HUANG Ke-wen;LIU Yi-min;HONG Yuan-quan(School of Physics and Mechanical and Electrical Engineering,Shaoguan University,Shaoguan 512005,Guandong,China)
出处
《韶关学院学报》
2019年第6期26-31,共6页
Journal of Shaoguan University
基金
韶关学院第四轮校级理论物理重点学科建设项目(韶学院[2016]73号)
关键词
TIADC
高速数据采集
数字示波器
时间交替采样
正弦拟合
误差校准
TIADC
high-speed data acquisition
digital oscilloscope
time-alternating sampling
sinusoidal fitting
error calibration
